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ADT7473
Table 70. REGISTER 0X5C, REGISTER 0X5D, AND REGISTER 0X5E ? CONFIGURATION REGISTERS
(ADT7473 POWER-ON DEFAULT = 0X82, ADT7473 ? 1 POWER-ON DEFAULT = 0X62)
Bit No.
<2:0>
Mnemonic
SPIN
R/W
R/W
Description
These bits control the startup timeout for PWMx. The PWM output stays high until two valid
TACH rising edges are seen from the fan. If there is not a valid TACH signal during the fan
TACH measurement directly after the fan startup timeout period, then the TACH
measurement reads 0xFFFF and Interrupt Status Register 2 reflects the fan fault. If the
TACH minimum high and low bytes contain 0xFFFF or 0x0000, then the Interrupt Status
Register 2 bit is not set, even if the fan has not started.
Bit Code Startup Time
000
001
010
011
100
101
110
111
No Startup Timeout
100 ms
250 ms (Default)
400 ms
667 ms
1 sec
2 sec
4 sec
<3>
<4>
<7:5>
SLOW
INV
BHVR
R/W
R/W
R/W
SLOW = 1 makes the ramp rates for acoustic enhancement four times longer.
This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for
100% duty cycle. Setting this bit to 1 inverts the PWM output, so 100% duty cycle
corresponds to a logic low output.
These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = Local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs full speed (default for ADT7473 ? 1).
100 = PWMx disabled (default for ADT7473).
101 = Fastest speed calculated by local and Remote 2 temperature controls PWMx.
110 = Fastest speed calculated by all three temperature channel controls PWMx.
111 = Manual mode. PWM duty cycle registers (Register 0x30 to Register 0x32) become
writable.
Table 71. TEMPERATURE T RANGE /PWM FREQUENCY REGISTERS
Register Address
0x5F
0x60
0x61
R/W (Note 1)
R/W
R/W
R/W
Description
Remote 1 T RANGE /PWM1 Frequency
Local Temperature T RANGE /PWM2 Frequency
Remote 2 T RANGE /PWM3 Frequency
Power-On Default
0xCC
0xCC
0xCC
1. These registers become read-only when the Configuration Register 1 Lock bit is set. Any further attempts to write to these registers have
no effect.
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